DDR5接收机测试
The M5513 is an all-inclusive memory test system for next-generation DDR5 multiplexed-rank dual inline
memory modules (MR-DIMM). Operating at blisteringly fast speeds, this test system is an ideal solution for longterm
DIMM development and test. It contains a complete side-band bus controller and provides full access to all
command, address, and data pins on a standard 288-pin DIMM under test. The M5513 can characterize the DDR
interface at its maximum speed, and it can also perform exhaustive memory read-write testing and functional
stress testing. A true ATE-on-Bench, the M5513 reduces cost and enhances interoperability of DDR5 systems.
memory modules (MR-DIMM). Operating at blisteringly fast speeds, this test system is an ideal solution for longterm
DIMM development and test. It contains a complete side-band bus controller and provides full access to all
command, address, and data pins on a standard 288-pin DIMM under test. The M5513 can characterize the DDR
interface at its maximum speed, and it can also perform exhaustive memory read-write testing and functional
stress testing. A true ATE-on-Bench, the M5513 reduces cost and enhances interoperability of DDR5 systems.
